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  ? 2001 fairchild semiconductor corporation ds012465 www.fairchildsemi.com may 1995 revised february 2001 74lcx157 low voltage quad 2-input multiplexer with 5v tolerant inputs 74lcx157 low voltage quad 2-input multiplexer with 5v tolerant inputs general description the lcx157 is a high-speed quad 2-input multiplexer. four bits of data from two sources can be selected using the common select and enable inputs. the four outputs present the selected data in the true (noninverted) form. the lcx157 can also be used as a function generator. the 74lcx157 is fabricated with advanced cmos technol- ogy to achieve high speed operation while maintaining cmos low power dissipation. features  5v tolerant inputs  2.3v?3.6v v cc specifications provided  5.8 ns t pd max (v cc = 3.3v), 10 a i cc max  power down high impedance inputs and outputs  24 ma output drive (v cc = 3.0v)  implements patented noise/emi reduction circuitry  latch-up performance exceeds 500 ma  esd performance: human body model > 2000v machine model > 200v ordering code: devices also available in tape and reel. specify by appending the suffix letter ? x ? to the ordering code. logic symbols ieee/iec connection diagram pin descriptions order number package number package description 74lcx157m m16a 16-lead small outline integrated circuit (soic), jedec ms-012, 0.150 narrow 74lcx157sj m16d 16-lead small outline package (sop), eiaj type ii, 5.3mm wide 74lcx157mtc mtc16 16-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide pin names description i 0a ? i 0d source 0 data inputs i 1a ? i 1d source 1 data inputs e enable input s select input z a ? z d outputs
www.fairchildsemi.com 2 74lcx157 functional description the lcx157 is a quad 2-input multiplexer. it selects four bits of data from two sources under the control of a com- mon select input (s). the enable input (e ) is active-low. when e is high, all of the outputs (z) are forced low regardless of all other inputs. the lcx157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels sup- plied to the select input. the logic equations for the outputs are shown below: z a = e  (i 1a  s + i 0a  s ) z b = e  (i 1b  s + i 0b  s ) z c = e  (i 1c  s + i 0c  s ) z d = e  (i 1d  s + i 0d  s ) a common use of the lcx157 is the moving of data from two groups of registers to four common output busses. the particular register from which the data comes is determined by the state of the select input. a less obvious use is as a function generator. the lcx157 can generate any four of the sixteen different functions of two variables with one variable common. this is useful for implementing gating functions. truth table h = high voltage level l = low voltage level x = immaterial logic diagram please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate pro pagation delays. inputs outputs e si 0 i 1 z hx x x l lh x l l lh x h h ll l x l ll h x h
3 www.fairchildsemi.com 74lcx157 absolute maximum ratings (note 1) recommended operating conditions (note 3) note 1: the absolute maximum ratings are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maxi mum ratings. the ? recom- mended operating conditions ? table will define the conditions for actual device operation. note 2: i o absolute maximum rating must be observed. note 3: unused inputs must be held high or low. they may not float. dc electrical characteristics symbol parameter value conditions units v cc supply voltage ? 0.5 to + 7.0 v v i dc input voltage ? 0.5 to + 7.0 v v o dc output voltage ? 0.5 to v cc + 0.5 output in high or low state (note 2) v i ik dc input diode current ? 50 v i < gnd ma i ok dc output diode current ? 50 v o < gnd ma + 50 v o > v cc i o dc output source/sink current 50 ma i cc dc supply current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature ? 65 to + 150 c symbol parameter min max units v cc supply voltage operating 2.0 3.6 v data retention 1.5 3.6 v i input voltage 05.5v v o output voltage high or low state 0 v cc v i oh /i ol output current v cc = 3.0v ? 3.6v 24 ma v cc = 2.7v ? 3.0v 12 v cc = 2.3v ? 2.7v 8 t a free-air operating temperature ? 40 85 c ? t/ ? v input edge rate, v in = 0.8v ? 2.0v, v cc = 3.0v 0 10 ns/v symbol parameter conditions v cc t a = ? 40 c to + 85 c units (v) min max v ih high level input voltage 2.3 ? 2.7 1.7 v 2.7 ? 3.6 2.0 v il low level input voltage 2.3 ? 2.7 0.7 v 2.7 ? 3.6 0.8 v oh high level output voltage i oh = ? 100 a2.3 ? 3.6 v cc ? 0.2 v i oh = ? 8 ma 2.3 1.8 i oh = ? 12 ma 2.7 2.2 i oh = ? 18 ma 3.0 2.4 i oh = ? 24 ma 3.0 2.2 v ol low level output voltage i ol = 100 a2.3 ? 3.6 0.2 v i oh = 8 ma 2.3 0.6 i ol = 12 ma 2.7 0.4 i ol = 16 ma 3.0 0.4 i ol = 24 ma 3.0 0.55 i i input leakage current 0 v i 5.5v 2.3 ? 3.6 5.0 a i off power-off leakage current v i or v o = 5.5v 0 10 a i cc quiescent supply current v i = v cc or gnd 2.3 ? 3.6 10 a 3.6v v i 5.5v 2.3 ? 3.6 10 ? i cc increase in i cc per input v ih = v cc ? 0.6v 2.3 ? 3.6 500 a
www.fairchildsemi.com 4 74lcx157 ac electrical characteristics note 4: skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of th e same device. the specification applies to any outputs switching in the same direction, either high-to-low (t oshl ) or low-to-high (t oslh ). parameter guaranteed by design. dynamic switching characteristics capacitance symbol parameter t a = ? 40 c to + 85 c, r l = 500 ? units v cc = 3.3v 0.3v v cc = 2.7v v cc = 2.5v 0.2v c l = 50 pf c l = 50 pf c l = 30 pf min max min max min max t phl propagation delay 1.5 7.0 1.5 8.0 1.5 8.4 ns t plh s z n 1.57.01.58.01.58.4 t phl propagation delay 1.5 7.0 1.5 8.0 1.5 8.4 ns t plh e z n 1.57.01.58.01.58.4 t phl propagation delay 1.5 5.8 1.5 6.3 1.5 7.0 ns t plh i n z n 1.55.81.56.31.57.0 t oshl output to output skew 1.0 ns t oslh (note 4) 1.0 symbol parameter conditions v cc t a = 25 c units (v) typical v olp quiet output dynamic peak v ol c l = 50 pf, v ih = 3.3v, v il = 0v 3.3 0.8 v cl= 30 pf, v ih = 2.5v, v il = 0v 2.5 0.6 v olv quiet output dynamic valley v ol c l = 50 pf, v ih = 3.3v, v il = 0v 3.3 ? 0.8 v cl= 30 pf, v ih = 2.5v, v il = 0v 2.5 -0.6 symbol parameter conditions typical units c in input capacitance v cc = open, v i = 0v or v cc 7pf c out output capacitance v cc = 3.3v, v i = 0v or v cc 8pf c pd power dissipation capacitance v cc = 3.3v, v i = 0v or v cc , f = 10 mhz 25 pf
5 www.fairchildsemi.com 74lcx157 ac loading and waveforms generic for lcx family figure 1. ac test circuit (c l includes probe and jig capacitance) waveform for inverting and non-inverting functions propagation delay. pulse width and t rec waveforms 3-state output high enable and disable times for logic 3-state output low enable and disable times for logic setup time, hold time and recovery time for logic t rise and t fall figure 2. waveforms (input characteristics; f =1mhz, t r = t f = 3ns) test switch t plh , t phl open t pzl , t plz 6v at v cc = 3.3 0.3v v cc x 2 at v cc = 2.5 0.2v t pzh , t phz gnd symbol v cc 3.3v 0.3v 2.7v 2.5v 0.2v v mi 1.5v 1.5v v cc /2 v mo 1.5v 1.5v v cc /2 v x v ol + 0.3v v ol + 0.3v v ol + 0.15v v y v oh ? 0.3v v oh ? 0.3v v oh ? 0.15v
www.fairchildsemi.com 6 74lcx157 schematic diagram generic for lcx family
7 www.fairchildsemi.com 74lcx157 physical dimensions inches (millimeters) unless otherwise noted 16-lead small outline integrated circuit (soic), jedec ms-012, 0.150 narrow package number m16a
www.fairchildsemi.com 8 74lcx157 physical dimensions inches (millimeters) unless otherwise noted (continued) 16-lead small outline package (sop), eiaj type ii, 5.3mm wide package number m16d
9 www.fairchildsemi.com 74lcx157 low voltage quad 2-input multiplexer with 5v tolerant inputs physical dimensions inches (millimeters) unless otherwise noted (continued) 16-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide package number mtc16 fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com


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